Dual Priority Scheduling Algorithm Used in the nMPRA Microcontrollers – Dynamic Scheduler

Autor/innen

  • Lucian ANDRIEȘ “Ștefan cel Mare” University of Suceava
  • Vasile Gheorghiță GĂITAN “Ștefan cel Mare” University of Suceava

Schlagwörter:

real time system, dynamic hardware scheduler, microcontroller, pipeline processor

Abstract

This paper is a follow up of an already published paper that described the static scheduler. It deals with a true dynamic scheduling algorithm that is meant to maximize the CPU utilization. The dual priority algorithm is composed of two different scheduling algorithms, earliest deadline first (EDF) and round robin (RR). We have chosen EDF, because it is a dynamic scheduling algorithm, used in real time operating systems, which can be easily implemented in hardware, by improving the nHSE architecture. The new dynamic scheduler algorithm provides a much better CPU utilization, very good switching time for tasks and events within 5 to 8 machine cycles and guarantees that no task will suffer from starvation.

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2015-06-15

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Zitationsvorschlag

1.
Dual Priority Scheduling Algorithm Used in the nMPRA Microcontrollers – Dynamic Scheduler. Ann_UGAL_MMS [Internet]. 15. Juni 2015 [zitiert 2. November 2026];38(2):66-71. Verfügbar unter: https://ojs.ugal.ro/index.php/mms/article/view/1359

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